I am a PostDoctoral Fellow at Hardware Verification Group (HVG), Concordia University, under the supervision of Prof. Sofiène Tahar since July 2023. I did my PhD from NUST-SEECS under the supervision of Dr. Osman Hasan. The topic of my PhD thesis was “Formalization of Transform Methods using Higher-order-logic Theorem Proving”. I worked as a Research Associate at System Analysis and Verification (SAVe) Lab, NUST-SEECS from March 2019 to March 2020. Prior to this, I worked as a Research Assistant at SAVe Lab from July 2013 to February 2019. I also worked as a visiting researcher at Hardware Verification Group (HVG), Concordia University, under the supervision of Prof. Sofiène Tahar from September 2017 to February 2018. I have a strong interest in Formal Methods, with their applications in Control Systems, Analog Circuits, Biological Systems, Robotics, Aerospace, Communication Systems, Cell Injection Systems, Transportation Systems and the Software Systems.